Frequently Asked Questions
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What are you announcing today?
We are announcing the formation of a Working Group committed to creating an open standard for next-generation memory interface technology. This technology will be ideal for mobile device manufacturers who are incorporating more media-rich features requiring higher performance at lower system cost.
What are the goals of the Serial Port Memory Technology (SPMT) Working Group?
The SPMT Working Group’s goal is to define a memory interface technology that reduces pin count by a minimum of 40 percent, provides a bandwidth range from 3.2-6.4GB/s and higher, reduces input/output power by 50 percent or more over other currently available DRAM offerings, and provides the ability to use either a single port or multiple ports into a single SPMT-enabled memory chip.
The overarching goal is to develop a consortium consisting of major players to help drive industry adoption.
While initially targeted at the mobile device market, the SPMT working group believes the technology will gain widespread adoption, penetrating other mobile market segments such as portable media players, digital still cameras, camcorders and handheld gaming devices. We believe it will eventually be adopted by any application that requires a low-cost,
high-bandwidth alternative to currently available memory solutions.
Introduction – What is SPMT?
As the name implies, SPMT will be a new memory interface architecture, initially targeted for Dynamic Random Access Memory (DRAM) chips, that employs a serial interface architecture rather than a parallel interface architecture as commonly found in current memory offerings. This new architecture will enable greater bandwidth flexibility, significantly reduced pin count, lower power demand and savings on overall system cost.
What is the SPMT Working Group?
The SPMT Working Group came together to pioneer a new technology to meet the growing needs of manufacturers to increase the performance and functionality of mobile devices while maintaining competitive or even reduced system cost. This is in response to mobile service providers demanding solutions that enable them to give consumers more
data-intensive, media-rich capabilities such as video (including high-definition video), GPS, gaming, Internet access, e-mail, multimedia applications and music at a competitive price.
The SPMT Working Group has been meeting since the third quarter of 2007 and intends
to organize a formal consortium later this year consisting of mobile device, memory and
system-on-chip manufacturers and semiconductor IP providers that will help bring the SPMT specification to the industry by the end of 2008.
Who are the members of the Working Group?
- ARM
- Hynix Semiconductor, Inc.
- LG Electronics
- Samsung Electronics
- Silicon Image, Inc.
- Sony Ericsson Mobile Communications AB
- STMicroelectronics
What will be the benefits of SPMT over existing memory technologies?
The mobile device market, particularly the handset market, is under intense competitive pressure to increase functionality while maintaining or reducing overall system cost.
One major consideration in designing a mobile device centers around what type of memory will be used by the system. All of the current memory architectures have varying degrees
of tradeoffs that affect overall system cost and performance.
All currently available memory chips have a parallel interface that requires a high number
of connections (pins) to achieve a minimum performance level for basic mobile
device functionality.
This is analogous to a carpool lane (serial) versus the remaining lanes (parallel) on a major highway. The carpool lane has more occupants (data) per car and moves at a greater speed (bandwidth) while the other lanes (parallel) have more lanes but fewer occupants (data) and move much slower (bandwidth) – particularly during rush-hour. In other words, you can get a lot more data from a high-speed serial lane than with multiple slower parallel lanes. To further the SPMT proposition, if you then had multiple serial lanes (ports), you could exponentially increase the amount of data available to supply the various functions
of the mobile device.
Key benefits of SPMT will include high yet flexible bandwidth, very low pin count, low power consumption, scalability, simplified circuit board layout and lower system cost, making it ideal for the mobile market.
The SPMT Working Group is the first to make significant progress toward defining a
serial-based memory interface targeted toward commodity DRAM and the mobile market.
What is the cost benefit of using chips based on SPMT?
As consumers demand more rich features, mobile device manufacturers are faced with the challenge and expense of adding more processors to deliver this functionality – and that requires faster and denser memory. By shifting from parallel to serial interface technology, you can:
- Reduce pin count by a minimum of 40 percent
- Provide a bandwidth range from 3.2-6.4GB/s and higher
- Reduce input/output power by 50 percent or more over other currently available
DRAM offerings
- Provide the ability to use either a single port or multiple ports into a single
SPMT-enabled memory chip
All of the above directly translate into lowering overall system cost.
What is the schedule for launching the SPMT Consortium?
The Working Group intends to form the SPMT Consortium some time in Q3 2008, although the timing may change.
When will products containing SPMT be available?
That will depend on the rate of industry adoption, but generally speaking, volume production could start in the 2011 timeframe.
What products or applications will take advantage of SPMT?
SPMT is initially targeted at the mobile phone handset market, since it allows manufacturers to incorporate more media-rich features into a system with higher performance and lower system cost. However, it’s expected to expand to other handheld devices such as portable media players, MP3 players and cameras after the technology is fully embraced.
Then eventually SPMT-enabled chips will migrate to any application where DRAM chips are found today.
Is the Working Group targeting the PC market?
The SPMT Working Group is not currently focused on markets other than mobile, but there is nothing to preclude SPMT-enabled chips to be used in the PC market.
Which memory technologies are compatible with SPMT?
Today, the technology is focused primarily on DRAM. However, there is nothing inherent in the technology that would preclude it from working with other memory technologies. As SPMT becomes more pervasive, the market opportunities that open up are boundless.
How will SPMT technology be made available to the industry?
Once the SPMT specification is ratified by the Consortium, it will be made available to the industry through the SPMT Consortium, with licensing terms yet to be decided by the SPMT Working Group. Those that license the technology from the SPMT Consortium can then create an implementation of the specification and integrate it into a SoC or memory chip. Others may license the specification and create an IP implementation that they may in turn license
to memory or SoC manufacturers that do not wish to create their own implementation.
Under what terms will SPMT be available for licensing? Will royalties be charged?
Over the next several months, the Working Group will define the parameters for making SPMT widely available to the global mobile industry. The working group is investigating all options that will achieve its goal of gaining rapid widespread adoption of the technology, so the terms are expected to be extremely favorable.
How do companies get involved in the Working Group?
There are no immediate plans to grow the Working Group beyond the current list of top industry leaders. However, if you want to know more about the state of the technology, please contact one of the members of the Working Group who may provide more information under NDA.
Will SPMT be tied in with the JEDEC Solid State Technology Association, the semiconductor engineering standardization body of the Electronic Industries Alliance?
The immediate plan is to launch the technology into the industry and drive adoption through a very focused consortium. At some point in the future, when the SPMT Consortium has reached its initial objective, it may choose to move the technology into JEDEC.
Is the Working Group considering participation in the Mobile Industry Processor Interface Alliance (MIPI)?
Over the next several months, the Working Group will address how SPMT will fit into other industry initiatives, both opportunistic and synergistic.